RFID Laboratory (RFIDLab)

Proceedings paper

10.1109/DSD.2016.29

Department of Computer Systems

This paper continues and extends our previous work introduced in [3], [4], in which we proposed a ring oscillator (RO) based Physical Unclonable Function (PUF) on FPGA. Our approach is able to extract multiple output bits from each RO pair in contrary to the classical approach, where frequencies of ROs are compared. Our original design used asymmetric ROs, i.e. without constrained placement of gates. In this paper, we investigate the behaviour of the proposed ROPUF using symmetric ROs, and compare them against the original approach with asymmetric ROs. The measurement results showed that the ROPUF with symmetric ROs is approximately two times more stable with varying temperature. We have also compared three different methods of information extraction from ROPUF based on frequency measurement. The measured results show that out of these three methods, our one is the most stable against change of temperature. The measurements were performed on Digilent Basys 2 FPGA boards (Xilinx Spartan3E-100 CP132).

Article

10.1016/j.micpro.2016.02.005

Department of Computer Systems

PUFs (Physical Unclonable Function) are increasingly used in proposals of security architectures for device identification and cryptographic key generation. Many PUF designs for FPGAs proposed up to this day are based on ring oscillators (RO). The classical approach is to compare frequencies of ROs and produce a single output bit from each pair of ROs based on the result of comparison of their frequencies. This ROPUF design requires all ROs to be mutually symmetric and also the number of pairs of ROs is limited in order to preserve the independence of bits in the PUF response. This led us to design a new ROPUF on FPGA which is capable of generating multiple output bits from each pair of ROs and is also allowing to create higher number of pairs of ROs, thereby making the use of ROs more efficient than the classical approach. Our PUF design is based on selecting a particular part of a counter value and using it for the PUF output. By applying Gray code on the counter values, we have considerably improved the PUF's statistical properties. In principle, this PUF design does not need the ROs to be mutually symmetric, however, it is shown that this ROPUF design has significantly better properties with varying supply voltage when symmetric ROs are used. All of the presented measurements were performed on Digilent Basys 2 FPGA Boards (Xilinx Spartan3E-100 CP132). In this work, we provide a more detailed description of the PUF design on FPGA and the behaviour of ROs with varying supply voltage. Our proposed PUF architecture offers more output bits with required statistical properties from each RO pair than the classical approach, where frequencies of ROs are compared. The presented improvements significantly reduce the dependence on fluctuation of supply voltage.

Article

10.1142/S0218126616400168

Department of Computer Systems

This paper deals with design of physical unclonable functions (PUFs) based on field-programmable gate array (FPGA). The goal was to propose a cheap, efficient and secure device identification or even a cryptographic key generation based on PUFs. Therefore, a design of a ring oscillator (RO)-based PUF producing more output bits from each RO pair is presented. 24 Digilent Basys 2 FPGA boards (Spartan-3E) and 6 Digilent Nexys 3 FPGA boards (Spartan-6) were tested and statistically evaluated indicating suitability of the proposed design for device identification. A stable PUF output is required for generating cryptographic keys. As post-processing technique to further improve the efficiency of this PUF design, we used Gray code on the obtained bits from RO pairs. Ultimately, the PUF design is combined with error correction code and together with Gray code is able to generate cryptographic keys of sufficient length.

Proceedings paper

10.1109/DDECS.2015.21

Department of Computer Systems

This paper deals with design of Physical Unclonable Functions (PUFs) based on FPGA. The goal was to propose a cheap, efficient and secure device identification or even a cryptographic key generation based on PUFs. Therefore, a proposal of a ring oscillator (RO) based PUF producing more output bits from one RO pair is presented. 24 Digilent Basys 2 FPGA boards were tested and statistically evaluated indicating suitability of the proposed design for device identification.