RFID Laboratory (RFIDLab)

In the RFID Laboratory, we deal with contactless and contact chip cards and other related topics. We do research into chip card security, their secure communication, the building blocks of secure chips, such as ciphers, truly random number generators (TRNG) and physically unclonable functions (PUF).

What we do

Research in the field of security also includes experiments, such as measurements of the behaviour of random generators at different temperatures. For this, we use a special temperature chamber that can change and maintain temperatures in the range from -40 to +180 °C.

In the laboratory, we develop and test educational boards for the instruction in courses Hardware Security (NIE-HWB) and Embedded Security (NIE-BVS).

Head of the laboratory

Equipment

Climatic chamber Binder MK-56obj

  • Dynamic chamber with temperatures from -40 to +180 °C
  • Operated through Ethernet, controlled by own SW in C++ or Python
  • Measures air temperature and the temperature of the object (such as a chip) by an auxiliary sensor

Oscilloscope Lecroy HDO9404

  • 4 GHz bandwidth, sampling frequency 40 GSa/s, 10 bit resolution
  • Maximum memory 128 MSa
  • 2 active differential probes with full bandwidth (4 GHz)

3D positioner

A 3D near-field measuring probe positioner of own production (3D printer mechanics, bachelor thesis)

The lab’s activities are focused on these topics

Projects

Cryptography for Securing Electronic Devices

Program
Studentská grantová soutěž ČVUT
Code
SGS17/214/OHK3/3T/18
Period
2017 - 2019
Description
The aim of this project is research in the field of security embedded systems. Developers typically design specific cryptographic primitives for electronic devices enabling their deployment in highly unsecured environments. These primitives must be adapted to the properties of the used embedded electronic devices in order to ensure the required level of security.

Publications

True random number generator based on ring oscillator PUF circuit

Year
2017
Published
Microprocessors and Microsystems. 2017, 53 33-41. ISSN 0141-9331.
Type
Article
Annotation
In this paper we propose the method of generating true random numbers utilizing the circuit primarily designed as Physically Unclonable Function (PUF) based on ring oscillators. The goal is to show that it is possible to design the universal crypto system, that can be used for various applications – the PUF can be utilized for asymmetric cryptography and generating asymmetric keys, True Random Number Generator (TRNG) for symmetric cryptography (generating session and ephemeral keys), nonces and salts. In the paper the results of evaluation of such a circuit utilized for TRNG purpose are presented.

True Random Number Generator Based on ROPUF Circuit

Year
2016
Published
Proceedings of 19th Euromicro Conference on Digital System Design DSD 2016. Los Alamitos, CA: IEEE Computer Soc., 2016. p. 519-523. ISBN 978-1-5090-2816-0.
Type
Proceedings paper
Annotation
In this paper we propose the method of generating true random numbers utilizing the circuit primarily designed as PUF based on ring oscillators. The goal is to prove that it is possible to design the universal crypto system, that can be used for various applications - the PUF can be utilized for asymmetric cryptography and generating asymmetric keys, TRNG for symmetric cryptography (generating session and ephemeral keys), nonces and salts. In the paper the results of evaluation of such a circuit utilized for TRNG purpose are presented.

All publications

Temperature Dependence of ROPUF on FPGA

Year
2016
Published
Proceedings of 19th Euromicro Conference on Digital System Design DSD 2016. Los Alamitos, CA: IEEE Computer Soc., 2016. p. 698-702. ISBN 978-1-5090-2816-0.
Type
Proceedings paper
Annotation
This paper continues and extends our previous work introduced in [3], [4], in which we proposed a ring oscillator (RO) based Physical Unclonable Function (PUF) on FPGA. Our approach is able to extract multiple output bits from each RO pair in contrary to the classical approach, where frequencies of ROs are compared. Our original design used asymmetric ROs, i.e. without constrained placement of gates. In this paper, we investigate the behaviour of the proposed ROPUF using symmetric ROs, and compare them against the original approach with asymmetric ROs. The measurement results showed that the ROPUF with symmetric ROs is approximately two times more stable with varying temperature. We have also compared three different methods of information extraction from ROPUF based on frequency measurement. The measured results show that out of these three methods, our one is the most stable against change of temperature. The measurements were performed on Digilent Basys 2 FPGA boards (Xilinx Spartan3E-100 CP132).

Improved ring oscillator PUF on FPGA and its properties

Year
2016
Published
Microprocessors and Microsystems. 2016, 47 55-63. ISSN 0141-9331.
Type
Article
Annotation
PUFs (Physical Unclonable Function) are increasingly used in proposals of security architectures for device identification and cryptographic key generation. Many PUF designs for FPGAs proposed up to this day are based on ring oscillators (RO). The classical approach is to compare frequencies of ROs and produce a single output bit from each pair of ROs based on the result of comparison of their frequencies. This ROPUF design requires all ROs to be mutually symmetric and also the number of pairs of ROs is limited in order to preserve the independence of bits in the PUF response. This led us to design a new ROPUF on FPGA which is capable of generating multiple output bits from each pair of ROs and is also allowing to create higher number of pairs of ROs, thereby making the use of ROs more efficient than the classical approach. Our PUF design is based on selecting a particular part of a counter value and using it for the PUF output. By applying Gray code on the counter values, we have considerably improved the PUF's statistical properties. In principle, this PUF design does not need the ROs to be mutually symmetric, however, it is shown that this ROPUF design has significantly better properties with varying supply voltage when symmetric ROs are used. All of the presented measurements were performed on Digilent Basys 2 FPGA Boards (Xilinx Spartan3E-100 CP132). In this work, we provide a more detailed description of the PUF design on FPGA and the behaviour of ROs with varying supply voltage. Our proposed PUF architecture offers more output bits with required statistical properties from each RO pair than the classical approach, where frequencies of ROs are compared. The presented improvements significantly reduce the dependence on fluctuation of supply voltage.

Proposal and Properties of Ring Oscillator-Based PUF on FPGA

Year
2016
Published
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS. 2016, 25(3), ISSN 0218-1266.
Type
Article
Annotation
This paper deals with design of physical unclonable functions (PUFs) based on field-programmable gate array (FPGA). The goal was to propose a cheap, efficient and secure device identification or even a cryptographic key generation based on PUFs. Therefore, a design of a ring oscillator (RO)-based PUF producing more output bits from each RO pair is presented. 24 Digilent Basys 2 FPGA boards (Spartan-3E) and 6 Digilent Nexys 3 FPGA boards (Spartan-6) were tested and statistically evaluated indicating suitability of the proposed design for device identification. A stable PUF output is required for generating cryptographic keys. As post-processing technique to further improve the efficiency of this PUF design, we used Gray code on the obtained bits from RO pairs. Ultimately, the PUF design is combined with error correction code and together with Gray code is able to generate cryptographic keys of sufficient length.

A Design of Ring Oscillator Based PUF on FPGA

Year
2015
Published
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2015 IEEE 18th International Symposium on. Piscataway: IEEE, 2015. p. 37-42. ISBN 978-1-4799-6780-3.
Type
Proceedings paper
Annotation
This paper deals with design of Physical Unclonable Functions (PUFs) based on FPGA. The goal was to propose a cheap, efficient and secure device identification or even a cryptographic key generation based on PUFs. Therefore, a proposal of a ring oscillator (RO) based PUF producing more output bits from one RO pair is presented. 24 Digilent Basys 2 FPGA boards were tested and statistically evaluated indicating suitability of the proposed design for device identification.

Contact person

Ing. Jiří Buček, Ph.D.

Where to find us

RFID Laboratory
Department of Information Security
Faculty of Information Technology
Czech Technical University in Prague

Room TH:A-1158 (Building A, 11th floor)
Thákurova 7
Prague 6 – Dejvice
160 00

The person responsible for the content of this page: doc. Ing. Štěpán Starosta, Ph.D.