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Ing. Filip Kodýtek, Ph.D.

Publikace

Comparison of three counter value based ROPUFs on FPGA

Rok
2020
Publikováno
Proceedings of the 23rd Euromicro Conference on Digital Systems Design. Los Alamitos, CA: IEEE Computer Soc., 2020. p. 205-212. ISBN 978-1-7281-9535-3.
Typ
Stať ve sborníku
Anotace
This paper extends our previous work, in which we proposed a Ring Oscillator (RO) based Physical Unclonable Function (PUF) on FPGA. Our approach is able to extract multiple output bits from each RO pair in contrary to the classical approach, where the frequencies of ROs are compared. In this work we investigate the behaviour of our proposed PUF design, together with two other similar proposals that are also based on extracting PUF bits from counter values. We evaluate these proposals under stable operating conditions. Furthermore, we compare the behaviour of all of the three designs when mutually asymmetric and symmetric ROs are used. All of the measurements were performed on Digilent Cmod S7 FPGA boards (Xilinx XC7S25-1CSGA225C).

Lightweight Authentication and Secure Communication Suitable for IoT Devices

Rok
2020
Publikováno
Proceedings of the 6th International Conference on Information Systems Security and Privacy. Madeira: SciTePress, 2020. p. 75-83. ISSN 2184-4356. ISBN 978-989-758-399-5.
Typ
Stať ve sborníku
Anotace
In this paper we present the protocols for lightweight authentication and secure communication for IoT and embedded devices. The protocols are using a PUF/TRNG combined circuit as a basic building block. The goal is to show the possibilities of securing communication and authentication of the embedded systems, using PUF and TRNG for secure key generation, without requirement to store secrets on the device itself, thus allowing to significantly simplify the problem of key management on the simple hardware devices and microcontrollers, while allowing secure communication.

Modeling of jitter of ring oscillators

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Rok
2019
Publikováno
Sborník příspěvků PAD 2019 – elektronická verze. Praha: AMCA spol. s r.o., 2019. p. 60-63. ISBN 978-80-88214-20-5.
Typ
Stať ve sborníku
Anotace
This contribution deals with a hardware design of a PUF and TRNG combined circuit. The proposed circuit has exhibited satisfactory behaviour for both cryptographic primitives; however, in case of TRNG, it needs to be evaluated in terms of randomness by developing a statistical model of its source of randomness. We use a jitter of ring oscillators as the source of randomness. The focus of this work is building and verifying the jitter’s statistical model.

A common design for PUF and TRNG based on ring oscillators

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Rok
2017
Publikováno
Počítačové architektúry & diagnostika PAD 2017 - Zborník príspevkov. Bratislava: STU Scientific, 2017. pp. 1-4. ISBN 978-80-972784-0-3.
Typ
Stať ve sborníku vyzvaná či oceněná
Anotace
This contribution deals with a hardware design of a circuit to be used for both Physical Unclonable Function (PUF) and True Random Number Generator (TRNG). The originally designed circuit is based on ring oscillators and was intended to be utilized as PUF. However, as it is shown in this paper, it turned out that the same circuit may also be used for generating true random numbers. The motivation behind using the same circuit for both applications is utilization of resources and designing a universal cryptosystem that can be used for various cryptographic applications. All of our experiments were performed on Digilent Basys 2 FPGA boards (Xilinx Spartan3E-100 CP 132) and the evaluation of the generated random sequences was performed using NIST statistical test suite.

True random number generator based on ring oscillator PUF circuit

Rok
2017
Publikováno
Microprocessors and Microsystems. 2017, 53 33-41. ISSN 0141-9331.
Typ
Článek
Anotace
In this paper we propose the method of generating true random numbers utilizing the circuit primarily designed as Physically Unclonable Function (PUF) based on ring oscillators. The goal is to show that it is possible to design the universal crypto system, that can be used for various applications – the PUF can be utilized for asymmetric cryptography and generating asymmetric keys, True Random Number Generator (TRNG) for symmetric cryptography (generating session and ephemeral keys), nonces and salts. In the paper the results of evaluation of such a circuit utilized for TRNG purpose are presented.

A ring oscillator based PUF proposal on FPGA

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Rok
2016
Publikováno
Počítačové Architektury & Diagnostika PAD 2016 - Sborník příspěvků. Brno: Vysoké učení technické v Brně, 2016. p. 29-32. ISBN 978-80-214-5376-0.
Typ
Stať ve sborníku vyzvaná či oceněná
Anotace
This contribution deals with design of Physical Unclonable Function (PUF) on FPGA. The goal was to propose a cheap, efficient and secure device identification or even a cryptographic key generation based on PUFs. Therefore, a design of a ring oscillator (RO) based PUF producing more output bits from each RO pair is presented. The design was tested on Digilent Basys 2 FPGA boards (Xilinx Spartan3E-100 CP132) and statistically evaluated. We also discuss its properties and analyse the proposed PUF at varying temperature and voltage. Based on the results of the experiments, we propose suitable modifications of the PUF design in order to improve the quality of its output.

Improved ring oscillator PUF on FPGA and its properties

Rok
2016
Publikováno
Microprocessors and Microsystems. 2016, 47 55-63. ISSN 0141-9331.
Typ
Článek
Anotace
PUFs (Physical Unclonable Function) are increasingly used in proposals of security architectures for device identification and cryptographic key generation. Many PUF designs for FPGAs proposed up to this day are based on ring oscillators (RO). The classical approach is to compare frequencies of ROs and produce a single output bit from each pair of ROs based on the result of comparison of their frequencies. This ROPUF design requires all ROs to be mutually symmetric and also the number of pairs of ROs is limited in order to preserve the independence of bits in the PUF response. This led us to design a new ROPUF on FPGA which is capable of generating multiple output bits from each pair of ROs and is also allowing to create higher number of pairs of ROs, thereby making the use of ROs more efficient than the classical approach. Our PUF design is based on selecting a particular part of a counter value and using it for the PUF output. By applying Gray code on the counter values, we have considerably improved the PUF's statistical properties. In principle, this PUF design does not need the ROs to be mutually symmetric, however, it is shown that this ROPUF design has significantly better properties with varying supply voltage when symmetric ROs are used. All of the presented measurements were performed on Digilent Basys 2 FPGA Boards (Xilinx Spartan3E-100 CP132). In this work, we provide a more detailed description of the PUF design on FPGA and the behaviour of ROs with varying supply voltage. Our proposed PUF architecture offers more output bits with required statistical properties from each RO pair than the classical approach, where frequencies of ROs are compared. The presented improvements significantly reduce the dependence on fluctuation of supply voltage.

Proposal and Properties of Ring Oscillator-Based PUF on FPGA

Rok
2016
Publikováno
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS. 2016, 25(3), ISSN 0218-1266.
Typ
Článek
Anotace
This paper deals with design of physical unclonable functions (PUFs) based on field-programmable gate array (FPGA). The goal was to propose a cheap, efficient and secure device identification or even a cryptographic key generation based on PUFs. Therefore, a design of a ring oscillator (RO)-based PUF producing more output bits from each RO pair is presented. 24 Digilent Basys 2 FPGA boards (Spartan-3E) and 6 Digilent Nexys 3 FPGA boards (Spartan-6) were tested and statistically evaluated indicating suitability of the proposed design for device identification. A stable PUF output is required for generating cryptographic keys. As post-processing technique to further improve the efficiency of this PUF design, we used Gray code on the obtained bits from RO pairs. Ultimately, the PUF design is combined with error correction code and together with Gray code is able to generate cryptographic keys of sufficient length.

Temperature Dependence of ROPUF on FPGA

Rok
2016
Publikováno
Proceedings of 19th Euromicro Conference on Digital System Design DSD 2016. Los Alamitos, CA: IEEE Computer Soc., 2016. p. 698-702. ISBN 978-1-5090-2816-0.
Typ
Stať ve sborníku
Anotace
This paper continues and extends our previous work introduced in [3], [4], in which we proposed a ring oscillator (RO) based Physical Unclonable Function (PUF) on FPGA. Our approach is able to extract multiple output bits from each RO pair in contrary to the classical approach, where frequencies of ROs are compared. Our original design used asymmetric ROs, i.e. without constrained placement of gates. In this paper, we investigate the behaviour of the proposed ROPUF using symmetric ROs, and compare them against the original approach with asymmetric ROs. The measurement results showed that the ROPUF with symmetric ROs is approximately two times more stable with varying temperature. We have also compared three different methods of information extraction from ROPUF based on frequency measurement. The measured results show that out of these three methods, our one is the most stable against change of temperature. The measurements were performed on Digilent Basys 2 FPGA boards (Xilinx Spartan3E-100 CP132).

True Random Number Generator Based on ROPUF Circuit

Rok
2016
Publikováno
Proceedings of 19th Euromicro Conference on Digital System Design DSD 2016. Los Alamitos, CA: IEEE Computer Soc., 2016. p. 519-523. ISBN 978-1-5090-2816-0.
Typ
Stať ve sborníku
Anotace
In this paper we propose the method of generating true random numbers utilizing the circuit primarily designed as PUF based on ring oscillators. The goal is to prove that it is possible to design the universal crypto system, that can be used for various applications - the PUF can be utilized for asymmetric cryptography and generating asymmetric keys, TRNG for symmetric cryptography (generating session and ephemeral keys), nonces and salts. In the paper the results of evaluation of such a circuit utilized for TRNG purpose are presented.

A Design of Ring Oscillator Based PUF on FPGA

Rok
2015
Publikováno
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2015 IEEE 18th International Symposium on. Piscataway: IEEE, 2015. p. 37-42. ISBN 978-1-4799-6780-3.
Typ
Stať ve sborníku
Anotace
This paper deals with design of Physical Unclonable Functions (PUFs) based on FPGA. The goal was to propose a cheap, efficient and secure device identification or even a cryptographic key generation based on PUFs. Therefore, a proposal of a ring oscillator (RO) based PUF producing more output bits from one RO pair is presented. 24 Digilent Basys 2 FPGA boards were tested and statistically evaluated indicating suitability of the proposed design for device identification.